Challenges in Device Development
As semiconductor device manufacturers and designers move from planar devices to structures built with complex 3D shapes, with air gaps, or with novel materials the complexity of manufacturing and gate level failure analysis increases dramatically. Identifying defects or resolving material interfaces in a FIB cut cross-section requires highly precise endpointing, surface preparation, and SEM imaging performance. For atomic level defects or compositional analysis, creating ultra-thin lamella for transmission electron (TEM) or atom probe (APM) microscopy that capture the correct region of interest (ROI) presents other challenges. Due to limited floorspace and budgets, labs are continually pushing to have best in class performance for each of these sample workflows in one sample preparation system.
- Ultra thin (<10nm) samples
- New materials (eg III-V)
- Complex deposition techniques
- New analytical techniques (eg. atom probe)
- Atomic level engineering
- High resolution strain measurement
FEI Solutions for Pathfinding
The Helios NanoLab 460F1 is designed to meet the varied challenges found in advanced semiconductor failure analysis labs by combining the highest resolution scanning electron microscope (Elstar+UC SEM) and focused ion beam (Tomahawk FIB) columns on the market today with the most advanced sample manipulation capabilities. In-situ, low kV (30kV) STEM imaging reduces the time to high resolution, high contrast imaging. New, high precision deposition and etching capabilities are mated with enhanced sample control and an extensive automation suite to deliver the right solution for any challenge your lab might encounter.
- Most flexible DualbeamTM - Helios NanoLab 460F1
- Atomic engineering TEMs - Themis & Metrios
- Sub 14nm circuit edit - V400ACE