Process Development and Yield Ramp

A revolution in TEM imaging and metrology volumes

Time to market is becoming crucial for the commercial success of mobile electronic devices.  Time to yield is critical to generate the required return on investment  and commercial success of each product.  Yield analysis at many of the steps in the manufacture of a semiconductor device used to be monitored by visual or SEM based tool sets, but these are now increasingly dependent on feedback and metrology from TEM images.  FEI is enabling this transition from SEM to TEM with new high productivity tool workflows which provide the lowest possible cost per TEM sample.


High Volume and Fast Turnaround Automated Inline TEM Sample Preparation

Throughput and turnaround of current TEM sample preparation methods in the lab are limited due to the level of difficulty and process time required for producing TEM lamellae. To improve TEM sample preparation time, the plan view sampling techniques as well as cross sectional whole wafer TEM sample preparation by a DualBeam (FIB/SEM) system were introduced into the manufacturing environment.

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Products for Process Development and Yield Ramp

Metrios TEM for Semiconductors
Advanced logic and memory manufacturing processes are becoming more reliant on fast turnaround of precise structural and analytical data to quickly calibrate tool sets, diagnose yield excursions and optimize process yields.  At technology nodes below 28nm, conventional SEM or optical based analysis and inspection tools cannot provide useful data. The FEI Metrios TEM automates the basic TEM operation and measurement procedures and minimizes the requirements for specialized operator training. Its advanced automated metrology routines deliver significantly greater precision than manual methods. The Metrios TEM is designed to deliver high volume TEM data, with accurate and repeatable operation - at the lowest cost-per-sample.
ExSolve WTP DualBeam for Semiconductors
The FEI ExSolve wafer TEM prep (WTP) DualBeam dramatically reduces the cost and increases the speed of sample preparation, providing semiconductor and data storage manufacturers with quick and easy access to the data they need to verify and monitor process performance.
Helios NanoLab 1200AT DualBeam for Semiconductors
The FEI Helios NanoLab 1200AT DualBeam™ is the newest generation of FEI’s full-wafer DualBeam and has been designed to satisfy 14nm node and beyond TEM sample preparation challenges. This system is capable of producing sub 15nm thick lamella samples in exactly the right location to capture point defects and isolate pre-defined structures for monitoring.
Helios NanoLab 460HP DualBeam for Semiconductors
Ideally suited for high throughput, high quality, ultra-thin TEM lamella preparation, the FEI Helios 460HP DualBeam™ comes with the EasyLift EX Nanomanipulator for in situ sample lift-out. When used in conjunction with FEI’s iFast Starter Recipes designed for either ex situ or in situ inverted sample preparation, even novice operators are able to create high-quality, ultra-thin lamella with tremendous confidence. The addition of the QuickFlip shuttle facilitates inverted sample thinning to eliminate curtaining in the region of interest. The combination of these unique features results in a >30% improvement in TEM lamella throughput over the Helios 450 DualBeam.
Helios PFIB DualBeam for Semiconductors
The FEI Helios PFIB DualBeam™ is the world's most advanced DualBeam Plasma FIB platform for large area deprocessing to enable electrical fault isolation of advanced process ICs and advanced failure analysis of 3D packages.
V400ACE Focused Ion Beam for Semiconductors
The FEI V400ACE FIB is specifically designed to meet the challenges of advanced designs and processes: smaller geometries, higher circuit densities, exotic materials and complex interconnect structures. The V400ACE FIB can be configured for backside editing with an optional IR microscope and bulk silicon trenching package.

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